Hardware description languages (HDLs) for reversible circuits are considered.
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An easy-to-use HDL-based tool for the synthesis of reversible circuits is presented.
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The tool provides two complementary synthesis schemes.
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The tool allows for trading-off additional circuit lines with the resulting gate costs and vice versa.
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The tool provides an intuitive GUI and offers additional functionality such as simulation.
Abstract
Reversible circuits form the backbone for many promising emerging technologies such as quantum computing, low power/adiabatic design, encoder/decoder devices, and several other applications. In the recent years, the scalable synthesis of such circuits has gained significant attention. In this work, we present the SyReC Synthesizer, a synthesis tool for reversible circuits based on the hardware description language SyReC. SyReC allows to describe reversible functionality at a high level of abstraction. The provided SyReC Synthesizer then realizes this functionality in a push-button fashion. Corresponding options allow for a trade-off between the number of needed circuit signals/lines (relevant, e.g., for quantum computing in which every circuit line corresponds to a qubit) and the respectively needed gates (corresponding to the circuit’s costs). Furthermore, the tool allows to simulate the resulting circuit as well as to determine the gate costs of it. The SyReC Synthesizer is available as an open-source software package at https://github.com/cda-tum/syrec as part of the Munich Quantum Toolkit (MQT).
